PWR_CTRL

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Interpret as PWR_CTRL

TX_DPHY_ISO=Val_0x0, DPHY_PLL_ISO=Val_0x0, UPHY_PWR_MASK=Val_0x0, RX_DPHY_ISO=Val_0x0, UPHY_ISO=Val_0x0, TX_DPHY_PWR_MASK=Val_0x0, DPHY_VPH_1P8_PWR_BYP_EN=Val_0x0, DPHY_PLL_PWR_MASK=Val_0x0, RX_DPHY_PWR_MASK=Val_0x0

Description

Power Control Register

Fields

TX_DPHY_PWR_MASK	Mask off the power for MIPI TX DPHY 0 (Val_0x0): Power not masked 1 (Val_0x1): Power masked off
TX_DPHY_ISO	Enable isolation for MIPI TX DPHY 0 (Val_0x0): Disable 1 (Val_0x1): Enable
RX_DPHY_PWR_MASK	Mask off the power for MIPI RX DPHY 0 (Val_0x0): Power not masked 1 (Val_0x1): Power masked off
RX_DPHY_ISO	Enable isolation for MIPI RX DPHY 0 (Val_0x0): Disable 1 (Val_0x1): Enable
DPHY_PLL_PWR_MASK	Mask off the power for MIPI PLL 0 (Val_0x0): Power not masked 1 (Val_0x1): Power masked off
DPHY_PLL_ISO	Enable isolation for MIPI PLL 0 (Val_0x0): Disable 1 (Val_0x1): Enable
DPHY_VPH_1P8_PWR_BYP_EN	dphy_vph_1p8_pwr_byp_en 0 (Val_0x0): Disable 1 (Val_0x1): Enable
DPHY_VPH_1P8_PWR_BYP_VAL	dphy_vph_1p8_pwr_byp_val
UPHY_PWR_MASK	Mask off the power for USB PHY 0 (Val_0x0): Power not masked 1 (Val_0x1): Power masked off
UPHY_ISO	Enable isolation for USB PHY 0 (Val_0x0): Disable 1 (Val_0x1): Enable

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